Technical SALES
  RISC-V: IP and expertise in design and verification as well as software and driver development from Andes, UltraSOC and Imperas


Quantum Leap Sales offers IP and design tools to support your RISC-V development   QLS partners, Andes Technologies, UltraSOC and Imperas are industry leaders in RISC-V IP, and provide platforms and tools to enable the most comprehensive embedded software development, as well as debug and test solutions.

Click below for the presentations of our recent webinars jointly presented by Andes Tech, Imperas and UltraSoc. Part 1: The latest challenges designers are facing migrating AI/ML application to custom SoC's with RISC-V, and Part 2: Optimizing embedded RISC-V hardware/software development from virtual models to in-life silicon instrumentation.

  • RISC-V Webinar Part 1   
  • RISC-V Webinar Part 2
  • Andes Technology  
    Andes Technology

    Andes Technology is the leading embedded RISC-V CPU IP supplier in the world. Founding member of the RISC-V Foundation. Offering single and multicore 32 bit and 64 bit RISC-V solutions with custom instructions and Vector and DSP extensions.

    The innovative configurable platform solution allows Andes' customers to construct unique system architecture and hardware/software partitioning to gain best optimization in all aspects.

    Over 15,000 seats of Andes development suite.

    Utilize Andes Custom Extension (ACE) software to add custom instructions, accelerators and coprocessor instructions.

    Learn more about Andes RISC-V free start program. HERE.

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    Imperas develops and markets state-of-the-art virtual platforms and tools to enable the most comprehensive embedded software development, debug and test solutions available today. The Imperas team has combined advanced simulation algorithms, modeling excellence, and a broad range of tools to produce a system that offers:

  • Supports RISC-V, ARM, ARC, MIPS and custom Fast Processor models

  • Ultra High Performance - boots Linux < 10 seconds (200 to 500 million instructions per second)

  • Over 200 Fast Processor models available

  • Imperas Benefits:

  • Custom / Proprietary Processor modeling (build an ISS for your processor - RISC-V, ARM, In-House)

  • Early software development platform pre-silicon accelerates software schedules

  • Software test platform to improve software quality

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    UltraSOC is a founding member of the RISC-V Foundation and chairs the RISC-V Instruction Trace committee.

    Suite of IP for silicon debug, performance monitoring, optimization and analytics. UltraSOC IP is non-intrusive and runs at wire speed. UltraSOC's portfolio supports all major CPUs including ARM, MIPS, Tensilica, CEVA and ARC, protocol-aware probes for buses, memory interfaces and custom logic monitors.

    Only SOC debug solution for heterogenous and RISC-V processor SOCs. Significantly reduces silicon bring-up and debug time and reduces time to market. 

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